Two Transistor XOR Gate Based Single Bit-Full Adder Design for Embedded Applications
نویسنده
چکیده
-This paper explains a new approach to design Exclusive-OR gate using 2 transistors. A full adder circuit has been designed by using proposed 2T Exclusive-OR circuit and a transmission gate is used extensively in very large-scale integration (VLSI) application. The power dissipation of the adder is in range of 421.7256uw to 581.542uw in 0.35 um technology with a voltage supply is in the range of 1.8V to 3.3V. The simulation process has performed by using the SPICE and DSCH software based on TSMC 0.35um CMOS technology. The power consumed by the 2T XOR gate as well as full adder has been compared with previously designed circuits, the proposed circuit shows good performance in terms of power consumption, speed and area optimization (transistor count).
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تاریخ انتشار 2015